Lattice Semiconductor (NASDAQ: LSCC), the low power programmable and platform firmware leader, and AMI, a Lattice company, today announced SCMP (Secure Control and Management Plane), a new Open Compute Project workstream. Announced during a joint keynote at the 2026 OCP Global Summit, SCMP is an open, vendor-neutral architecture for secure control, boot, and management of data center infrastructure. It gives data center operators more confidence that complex AI systems will work as expected across vendors and platforms, with less integration risk and more freedom of choice. SCMP defines how a control authority establishes and maintains trust from silicon root of trust through rack and pod, building on existing OCP initiatives and industry standards.
“As AI infrastructure scales toward autonomous operation, the management and control plane becomes the foundation of trust. That foundation should be open and verifiable, and SCMP gives the industry a common architecture to achieve it, from silicon to rack to grid. We’re pleased to launch this work with OCP and our founding contributors, and we invite the industry to help define it.” — Ford Tamer, CEO, Lattice Semiconductor
“Firmware sits at the center of every data center's control path, and AMI has seen firsthand where fragmentation limits security and interoperability. SCMP turns that experience into an open specification that any vendor can implement and any operator or auditor can verify. We are contributing alongside the other founding members, and look forward to working with the OCP community to make trusted management and control the golden standard for AI infrastructure.” — Sanjoy Maity, SVP, AMI, A Lattice Company
“SCMP represents an important milestone in advancing open, trusted infrastructure management for next-generation AI data centers. It also complements OCP's 'Chip-to-Grid' Vision and the Mission by bringing the needed Open Firmware (BMC and FPGAs) designs integrated with Open Hardware! OCP welcomes this initiative from Lattice and AMI, and all the other founding companies contributing to the OCP's SCMP workstream. This reflects our shared commitment to open collaboration, interoperable standards, and a more secure foundation for AI-scale infrastructure and end-to-end computer continuum developments." — George Tchaparian, CEO, Open Compute Project Foundation
Closing Gaps in Infrastructure Control
As outlined in the Lattice and AMI keynote presentation at OCP Global Summit 2026, several areas of infrastructure control remain unspecified or vendor-specific today, at a time when data center AI capital expenditure is projected to reach $1.2 trillion in 2027i. SCMP addresses key challenges to connecting them, including:
- Accelerated Shift Left: Boot-up above the device boundary is unspecified. SCMP defines the control authority and the bring-up sequence that govern how a rack is booted, verified, and supplied with firmware.
- Increasing Complexity: Control and telemetry interfaces vary by platform and ODM. SCMP standardizes the control authority interface and its delegation model, so compliant implementations are interchangeable.
- Distributed Security: Attestation terminates at the device boundary. SCMP specifies how component identities compose into a verifiable trust chain at the rack and pod tier, building on Caliptra™, DMTF SPDM, and OCP S.A.F.E.™
- Future-Proofing Infrastructure: Recovery from failed trusted boot, ownership transfer, and revocation are undefined across vendors. SCMP defines these procedures as open, verifiable interfaces, ensuring infrastructure can be secured, recovered, and re-provisioned across vendors and generations.
SCMP launches with AMD, AMI, Arm, ASPEED, Intel, Jabil, Lattice, Microsoft, and NXP as founders, each of whom bring core competencies and expertise to strengthen the workstream’s mission and success.
“AI infrastructure is increasingly being designed at the rack level, where compute, networking, security and management need to work together as a trusted system. Through SCMP, Arm is bringing our compute, security and platform expertise to the OCP community to help define an open, interoperable foundation for trusted AI infrastructure at scale.” — Eddie Ramirez, Vice President of Go-to-Market, Cloud AI, Arm
Join SCMP to Help Shape Open Infrastructure Control
Given the industry's need for an open, verifiable foundation for infrastructure control, OCP, whose community represents more than 400 member companies, has invited Lattice and AMI to lead the development of SCMP. The workstream launches in Q4 2026 with founding contributors across silicon, firmware, manufacturing, and operations, and is open to all OCP participants, including operators, silicon suppliers, ODMs, and system integrators. All contributions are made under the OCP contribution license. Interested organizations may contact Lattice or AMI, or visit opencompute.org.
Supporting Resources
- For more information about the SCMP (Secure Control and Management Plane) OCP workstream, visit the OCP Community webpage.
- For more information about Lattice and AMI's participation at OCP Global Summit 2026, visit OCP event webpage.
- For more information about the OCP Global Summit, visit OCP Global Summit webpage.
About Lattice Semiconductor
Lattice Semiconductor (NASDAQ: LSCC) is the low power programmable and platform firmware leader. We solve customer challenges from the Edge to the Cloud, in the growing Compute, Communications, Industrial, and Embedded markets. With the addition of AMI's industry-leading, silicon-neutral platform firmware and infrastructure manageability solutions, Lattice now delivers the industry's most complete secure management and control platform for cloud and AI data center infrastructure. Our technology, long-standing relationships, and commitment to world-class support let our customers quickly and easily unleash their innovation to create a smart, secure, and connected world. For more information about Lattice, please visit www.latticesemi.com and follow us via LinkedIn, X, YouTube, Facebook, WeChat, and Weibo.
Lattice Semiconductor Corporation, Lattice Semiconductor (& design), AMI, and specific product designations are either registered trademarks or trademarks of Lattice Semiconductor Corporation or its subsidiaries in the United States and/or other countries. The use of the word “partner” does not imply a legal partnership between Lattice and any other entity.
GENERAL NOTICE: Other product names used in this publication are for identification purposes only and may be trademarks of their respective holders
i Morgan Stanley, Sept 2026
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